• Vincent Lyles

Patent Application Published

Our patent application has been published as WO2022029443.   We provide side channel resistance by disrupting the temporal relationship between the algorithm and the leaking signal. We randomly present for execution, in an asynchronous wait-free manner, some or all non-commutative steps, and/or some or all commutative steps. We have critical fairness guarantees that ensure that all parts of the algorithm get presented and all get executed. For a block cipher, such as AES, there is interleaving of tasks within blocks and between blocks. After each run of a pipeline, the pointers are randomised again. Once running, all one can really say is that earlier plaintext blocks are either fully converted or having later steps being completed and later plaintext blocks are either having earlier steps completed or waiting in a queue.

Below is a flowchart summarising the methods described in the patent application.

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